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TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 1 the lumenology company copyright 2003, taos inc. www.taosinc.com 128 1 sensor-element organization 400 dots-per-inch (dpi) sensor pitch high linearity and uniformity wide dynamic range . . . 4000:1 (72 db) output referenced to ground low image lag . . . 0.5% typ operation to 8 mhz single 3-v to 5-v supply rail-to-rail output swing (ao) no external load resistor required description the TSL1401CS linear sensor array consists of a 128 1 array of photodiodes, associated charge amplifier circuitry, and a pixel data-hold function that provides simultaneous-integration start and stop times for all pixels. the pixels measure 63.5 m m (h) by 55.5 m m (w) with 63.5- m m center-to- center spacing and 8- m m spacing between pixels. operation is sim plified by internal control logic that requires only a serial-input (si) signal and a clock. functional block diagram 1 3 si clk 128-bit shift register q128 switch control logic integrator reset _ + pixel 1 pixel 2 pixel 128 pixel 3 sample/ output analog bus q3 q2 q1 hold 2 so 7 output buffer gain trim v dd ao gnd 4, 5 8 6 texas advanced optoelectronic solutions inc. 800 jupiter road, suite 205 plano, tx 75074 (972) 673-0759 hold 2 gnd 4 ao 6 v dd 8 (top view) 1 si 3 clk 5 gnd 7 so
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 2 copyright 2003, taos inc. the lumenology company www.taosinc.com terminal functions terminal description name no. description ao 6 analog output clk 3 clock. the clock controls charge transfer, pixel output, and reset. gnd 4, 5 ground (substrate). all voltages are referenced to the substrate. hold 2 hold signal. hold freezes the result of a 128 pixel scan. si 1 serial input. si defines the start of the data-out sequence. so 7 serial output. so provides a signal to drive the si input of another device for cascading or as an end-of-data indication. v dd 8 supply voltage. supply voltage for both analog and digital circuits. detailed description the sensor consists of 128 photodiodes arranged in a linear array. light energy impinging on a photodiode generates photocurrent, which is integrated by the active integration circuitry associated with that pixel. during the integration period, a sampling capacitor connects to the output of the integrator through an analog switch. the amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration time. the output and reset of the integrators is controlled by a 128-bit shift register and reset logic. an output cycle is initiated by clocking in a logic 1 on si. for proper operation, after meeting the minimum hold time condition, si must go low before the next rising edge of the clock. the signal called hold is normally connected to si. then, the rising edge of si causes a hold condition. this causes all 128 sampling capacitors to be disconnected from their respective integrators and starts an integrator reset period. as the si pulse is clocked through the shift register, the charge stored on the sampling capacitors is sequentially connected to a charge-coupled output amplifier that generates a voltage on analog output ao. simultaneously, during the first 18 clock cycles, all pixel integrators are reset, and the next integration cycle begins on the 19th clock. on the 129th clock rising edge, the si pulse is clocked out of the shift register and the analog output ao assumes a high impedance state. note that this 129th clock pulse is required to terminate the output of the 128th pixel, and return the internal logic to a known state. a subsequent si pulse may be presented as early as the 130th clock pulse, thereby initiating another pixel output cycle. ao is an op amp-type output that does not require an external pull-down resistor. this design allows a rail-to-rail output voltage swing. with v dd = 5 v, the output is nominally 0 v for no light input, 2 v for normal white level, and 4.8 v for saturation light level. when the device is not in the output phase, ao is in a high-impedance state. the voltage developed at analog output (ao) is given by: v out = v drk + (r e ) (e e )(t int ) where: v out is the analog output voltage for white condition v drk is the analog output voltage for dark condition r e is the device responsivity for a given wavelength of light given in v/( m j/cm 2 ) e e is the incident irradiance in m w/cm 2 t int is integration time in seconds a 0.1 m f bypass capacitor should be connected between v dd and ground as close as possible to the device. the TSL1401CS is intended for use in a wide variety of applications, including: image scanning, mark and code reading, optical character recognition (ocr) and contact imaging, edge detection and positioning, and optical linear and rotary encoding.
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 3 the lumenology company copyright 2003, taos inc. www.taosinc.com absolute maximum ratings 2 supply voltage range, v dd -0.3 v to 6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i - 0.3 v to v dd + 0.3v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) or (v i > v dd ) - 20 ma to 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v dd ) - 25 ma to 25 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . voltage range applied to any output in the high impedance or power-off state, v o - 0.3 v to v dd + 0.3 v . . . continuous output current, i o (v o = 0 to v dd ) - 25 ma to 25 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v dd or gnd - 40 ma to 40 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . analog output current range, i o - 25 ma to 25 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . maximum light exposure at 638 nm 5 mj/cm 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating free-air temperature range, t a -40 c to 100 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg -40 c to 100 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . solder reflow temperature, case exposed for 10 seconds 260 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under absolute maximum ratingso may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions (see figure 1 and figure 2) min nom max unit supply voltage, v dd 3 5 5.5 v input voltage, v i 0 v dd v high-level input voltage, v ih 2 v dd v low-level input voltage, v il 0 0.8 v wavelength of light source, l 400 1000 nm clock frequency, f clock 5 8000 khz sensor integration time, t int (see note 1) 0.016 100 ms setup time, serial input, t su(si) 20 ns hold time, serial input, t h(si) (see note 2) 0 ns operating free-air temperature, t a -40 85 c notes: 1. this time does not include the 18 clock cycles for setup, which would consume an additional 0.002 ms of device integrate and read time. 2. si must go low before the rising edge of the next clock pulse.
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 4 copyright 2003, taos inc. the lumenology company www.taosinc.com electrical characteristics at f clock = 1 mhz, v dd = 5 v, t a = 25 c, l p = 640 nm, t int = 5 ms, r l = 330 w , e e = 11 m w/cm 2 (unless otherwise noted) (see note 3 and note 4) parameter test conditions min typ max unit v out analog output voltage (white, average over 128 pixels) 1.6 2 2.4 v v drk analog output voltage (dark, average over 128 pixels) e e = 0 0 0.1 0.2 v prnu pixel response nonuniformity see note 5 4% 10% nonlinearity of analog output voltage see note 6 0.4% fs output noise voltage see note 7 1 mvrms r e responsivity see note 8 25 35 44 v/ (m j/cm 2 ) v analog output saturation voltage v dd = 5 v, r l = 330 w 4.5 4.8 v v sat analog output saturation voltage v dd = 3 v, r l = 330 w 2.5 2.8 v se saturation exposure v dd = 5 v, see note 9 136 nj/cm 2 se saturation exposure v dd = 3 v, see note 9 78 nj/cm 2 dsnu dark signal nonuniformity all pixels, e e = 0 see note 10 0.02 0.05 v il image lag see note 11 0.5% i supply current v dd = 5 v, e e = 0 2.8 4.5 ma i dd supply current v dd = 3 v, e e = 0 2.6 4.5 ma v ih high-level input voltage 2 v v il low-level input voltage 0.8 v i ih high-level input current v i = v dd 1 m a i il low-level input current v i = 0 1 m a c i input capacitance 5 pf notes: 3. the array is uniformly illuminated with a diffused led source having a peak wavelength of 640 nm. 4. all measurements made with a 0.1 m f capacitor connected between v dd and ground. 5. prnu is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of th e device under test when the array is uniformly illuminated at the white irradiance level. prnu includes dsnu. 6. nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent of analog output voltage (white). 7. rms noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period. 8. r e(min) = [v out(min) - v drk(max) ] (e e t int ) 9. se(min) = [v sat(min) - v drk(min) ] ? e e t int ) [v out(max) - v drk(min) ] 10. dsnu is the difference between the maximum and minimum output voltage for all pixels in the absence of illumination. 11. image lag is a residual signal left in a pixel from a previous exposure. it is defined as a percent of white-level signal remaining a fter a pixel is exposed to a white condition followed by a dark condition: il v out (il) v drk v out (white) v drk 100 timing requirements (see figure 1 and figure 2) min nom max unit t su(si) setup time, serial input (see note 12) 20 ns t h(si) hold time, serial input (see note 11 and note 13) 0 ns t w pulse duration, clock high or low 50 ns t r , t f input transition (rise and fall) time 0 500 ns notes: 12. input pulses have the following characteristics: t r = 6 ns, t f = 6 ns. 13. si must go low before the rising edge of the next clock pulse.
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 5 the lumenology company copyright 2003, taos inc. www.taosinc.com dynamic characteristics over recommended ranges of supply voltage and operating free-air temperature (see figures 3 and 4) parameter test conditions min typ max unit t s analog output settling time to 1% r l = 330 w , c l = 10 pf 120 ns typical characteristics ???????????????????? ???????????????????? ???????? ???????? 18 clock cycles 129 clock cycles clk si ao internal reset integration hi-z hi-z not integrating integrating figure 1. timing waveforms 50% ao si clk pixel 128 t s 0 v 0 v 5 v 2.5 v t h(si) 5 v t su(si) t w 1 2 128 129 t s pixel 1 figure 2. operational waveforms
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 6 copyright 2003, taos inc. the lumenology company www.taosinc.com typical characteristics figure 3 settling time vs. load r l e load resistance - settling time to 1% e ns 0 200 400 600 800 1000 0 100 200 300 400 500 600 v dd = 3 v v out = 1 v 470 pf 220 pf 100 pf 10 pf v dd = 3 v v out = 1 v figure 4 settling time vs. load r l e load resistance - settling time to 1% e ns 0 200 400 600 800 1000 0 100 200 300 400 500 600 v dd = 5 v v out = 1 v 470 pf 220 pf 100 pf 10 pf figure 5 photodiode spectral responsivity l - wavelength - nm 400 500 600 700 800 900 1000 1100 300 0 0.2 0.4 0.6 0.8 1 relative responsivity t a = 25 c figure 6 supply current vs free-air temperature t a - free-air temperature - c 010 3040 70 60 i dd e supply current e ma 0 1 2 3 4 20 50 v dd = 5 v e e = 0 r l = 330
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 7 the lumenology company copyright 2003, taos inc. www.taosinc.com typical characteristics figure 7 white output voltage vs free-air temperature t a - free-air temperature - c 0 0.5 1 1.5 2 v out e output voltage e v 010 3040 70 60 20 50 v dd = 5 v t int = 0.5 ms to 15 ms e e = varies figure 8 dark output voltage vs free-air temperature t a - free-air temperature - c 0.060 0.080 0.100 v out e output voltage e v 010 3040 70 60 20 50 v dd = 5 v t int = 15 ms t int = 5 ms t int = 2.5 ms t int = 0.5 ms t int = 1 ms 0.070 0.090
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 8 copyright 2003, taos inc. the lumenology company www.taosinc.com application information a 0.1 m f bypass capacitor should be connected between v dd and ground as close as possible to the device. the hold pin on the device is normally connected to the si pin in single-die operation. in multi-die operation of n die, the hold pin is used to provide a continuous scan across the n die. see figure 9 for an example of this wiring configuration. note that there is a single ao signal when used in this mode. alternately, the individual die may be scanned all at once by connecting the individual si and hold lines and reading the ao signals in parallel. see figure 10 for an example of this wiring configuration. so 7 ao 6 gnd gnd si hold clk TSL1401CS v dd 5 8 4 3 2 1 so 7 ao 6 gnd si hold clk TSL1401CS v dd 5 8 4 3 2 1 so 7 ao 6 gnd si hold clk TSL1401CS v dd 5 8 4 3 2 1 ao si clk v dd c1 0.1 f c2 0.1 f c3 0.1 f figure 9. multi-die continuous scan so 7 ao 6 gnd gnd si hold clk TSL1401CS v dd 5 8 4 3 2 1 so 7 ao 6 gnd si hold clk TSL1401CS v dd 5 8 4 3 2 1 so 7 ao 6 gnd si hold clk TSL1401CS v dd 5 8 4 3 2 1 ao2 si clk v dd ao1 ao3 c1 0.1 f c2 0.1 f c3 0.1 f figure 10. multi-die individual scan
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 9 the lumenology company copyright 2003, taos inc. www.taosinc.com application information bottom top figure 11. device pictorial 170 123456 78 8 110 trace width 7 1000 8 380 diameter mask 8 360 diameter metal pad notes: a. all linear dimensions are in micrometers. b. this drawing is subject to change without notice. figure 12. suggested pcb layout
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 10 copyright 2003, taos inc. the lumenology company www.taosinc.com mechanical information the TSL1401CS is available in a solder bump linear array package, ready for surface mount manufacturing processes. pin 1 si pin 2 hold pin 3 clk pin 4 gnd pin 5 gnd pin 6 ao pin 7 so pin 8 v dd ?????????????????????? ?????????????????????? 8120 8870 25 top view side view pixel 1 pixel 128 655 30 8 145 30 alignment marker (pin 8) 1000 25 bottom view 935 30 7 1000 4 170 4 415 30 127 63.5 128 55.5 375 25 a b 128 63.5 430.4 25 detail a detail b 4 8 62 4 265 25 notes: a. all linear dimensions are in micrometers. b. unless otherwise noted, all dimensions are 10. c. this drawing is subject to change without notice. figure 13. packaging configuration
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 11 the lumenology company copyright 2003, taos inc. www.taosinc.com mechanical information side view top view detail a detail b 7.60 9.17 0.82 1.29 1.17 8 max 0.300 0.200 1.24 0.100 4 0.100 4 0.100 typ 2 0.100 c l 1.5 0.100 typ 1.75 0.100 7.50 0.100 + 0.300 - 0.100 16 a a bb r 0.58 k o a o b o 5 max pin 1 notes: a. all linear dimensions are in millimeters. b. the dimensions on this drawing are for illustrative purposes only. dimensions of an actual carrier may vary slightly. c. symbols on drawing a o , b o , and k o are defined in ansi eia standard 481-b 2001. d. each reel is 178 millimeters in diameter and contains 2800 parts. e. taos packaging tape and reel conform to the requirements of eia standard 481-b. f. this drawing is subject to change without notice. figure 14. TSL1401CS carrier tape
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 12 copyright 2003, taos inc. the lumenology company www.taosinc.com manufacturing information this product has been tested and has demonstrated an ability to be reflow soldered to a pcb substrate. the process, equipment, and materials used in these tests are detailed below. tooling required solder stencil (round aperture size 0.36 mm, stencil thickness of 152.4 m m) 20 20 frame for solder stencil process 1. apply solder paste using stencil 2. dispense adhesive dots 3. place component 4. reflow solder/cure 5. x-ray verify placement of the TSL1401CS device onto the gold immersion substrate is accomplished using a standard surface mount manufacturing process. first, using the stencil with 0.36 mm square aperture, print solder paste onto the substrate. next, dispense two 0.25 mm to 0.4 mm diameter dots of adhesive in opposing corners of the TSL1401CS mounting area. machine place the TSL1401CS from the jedec waffle carrier onto the substrate. a suggested pick-up tool is the siemens vacuum pickup tool nozzle number 912. this nozzle has a rubber tip with a diameter of approximately 0.75 mm. the part is picked up from the center of the body. reflow the solder and cure the adhesive using the solder profile shown in figure 15. time - s 0 50 100 150 200 250 400 300 350 0 50 100 150 200 250 450 500 temperature e c figure 15. TSL1401CS solder profile it is important to use a substrate that has an immersion plating surface. this may be immersion gold, silver, or white tin. hot air solder leveled substrates (hasl) are not coplanar and should not be used.
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 13 the lumenology company copyright 2003, taos inc. www.taosinc.com manufacturing information qualified equipment ekra e5 e stencil printer asymtec century e dispensing system siemens f5 e placement system - siemens 912 e vacuum pickup tool nozzle vitronics 820 e oven phoenix e inspector x-ray system qualified materials omg e microbond solder paste loctite 3621 e adhesive
TSL1401CS 128 1 linear sensor array with hold taos036a - august 2003 14 copyright 2003, taos inc. the lumenology company www.taosinc.com production data e information in this document is current at publication date. products conform to specifications in accordance with the terms of texas advanced optoelectronic solutions, inc. standard warranty. production processing does not necessarily include testing of all parameters. notice texas advanced optoelectronic solutions, inc. (t aos) reserves the right to make changes to the products contained in this document to improve performance or for any other purpose, or to discontinue them without notice. customers are advised to contact taos to obtain the latest product information before placing orders or designing taos products into systems. taos assumes no responsibility for the use of any products or circuits described in this document or customer product design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that the circuits are free of patent infringement. taos further makes no claim as to the suitability of its products for any particu lar purpose, nor does taos assume any liability arising out of the use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. texas advanced optoelectronic solutions, inc. products are not designed or intended for use in critical applications in which the failure or malfunction of the taos product may result in personal injury or death. use of taos products in life support systems is expressly unauthorized and any such use by a customer is completely at the customer's risk. lumenology, taos, the taos logo, and texas advanced optoelectronic solutions are registered trademarks of texas advanced optoelectronic solutions incorporated.

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